$ cat ~/work/servo-motor-controller.md
project · embedded · 2023
Hobby Servo SCOMP Peripheral
FPGA Peripheral and Assembly Driver
A memory-mapped servo pulse generator for the SCOMP soft CPU on a DE10-Standard, plus the assembly program that drives it.
- kind
- project
- course
- ECE 2031, Georgia Tech
- category
- embedded
- period
- Aug 2023 - Dec 2023
- status
- completed
- role
- Project manager and lead assembly author
- team
- 5 members
head -n 20 README
A hobby-servo peripheral in VHDL for SCOMP, a 16-bit soft processor on a Terasic DE10-Standard, and the assembly program that drives it. The final project of a nine-lab digital design sequence.
The peripheral is a pulse generator mapped into SCOMP's I/O space. A write latches a command; the hardware masks the angle, clamps it at 180 degrees and turns it into a servo pulse between 0.5 and 2.5 ms, refreshed on a 20 ms frame from a 10 kHz tick with a counter that steps by nine. The command is 10 bits: two for an advanced mode, seven for the angle, and a last bit that switches application. I was the project manager and led the assembly side; the team was split into VHDL, assembly and management, with a schedule to track progress. Besides the angle controller, the peripheral supports switching modes without a reset, implemented as a small state machine on the lowest command bit.
grep -n highlights
- 01Project manager and lead assembly author on a five-person team.
- 02Built a servo pulse-generator peripheral mapped into SCOMP's I/O space, clamping the angle in hardware and generating 0.5 to 2.5 ms pulses on a 20 ms frame.
- 03Led the assembly side: a test program that passes switch values straight to the peripheral, and the mode-switching flow on the lowest command bit.
- 04Defined the 10-bit command format and the mode-switching flow.
- 05Worked up to the project through a nine-lab sequence, including adding SUB and JPOS instructions to the SCOMP CPU in VHDL.